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计算机组成与设计硬件(英文版.第3版)

计算机组成与设计硬件(英文版.第3版)

定 价:¥85.00

作 者: 帕特森
出版社: 机械工业
丛编项: 软件接口:经典原版书库
标 签: 暂缺

ISBN: 9787111193395 出版时间: 2006-07-01 包装: 简裝本
开本: 16开 页数: 621 字数:  

内容简介

  软件设计者对软件系统运行环境硬件技术是否了解、了解多少会很大程度地影响软件系统的性能,同样,硬件设计者也必须了解他们的设计决策将对软件产生怎样的影响。本书着眼于当前计算机设计中最基本的概念,展示了软硬件间的关系。无论上述的哪一类读者,本书的内容都会使他们对计算机有更深入的认识。 同以往版本一样,本书采用MIPS处理器作为展示计算机硬件技术基本功能的核心。书中逐条指令地列举了完整的MIPS指令集——汇编语言的核心、计算机算术运算、流水线、存储器层次结构以及I/O,并介绍了网络和多处理器结构的基本内容。 将CPU性能和程序性能紧密地联系起来是本版的一个新增内容。作者展示了软硬件部件 (如算法、编程语言、编译器、指令集系统结构以及处理器的实现) 如何影响程序的性能。另外,本版对软硬件的讨论更加深入,并在光盘中为侧重硬件和侧重软件的读者分别提供了相关资料。 随书光盘的内容非常丰富,不仅包括第9章、附录、本书网站内容、附加习题、术语表、参考文献、索引等,而且还提供了HDL模拟器、MIPS模拟器以及FPGA设计工具等软件。 本书主要特点■ 书中资料全部更新,以反映最新技术。 ■ 使用标准32位MIPS指令集作为教学指令集。 ■ 反映了体系结构的最新进展: ● IntelIA-32 ● Power PC 604 ● Pentium P4 ● Google的PC集群 ● 处理器基准测试集SPEC CPU2000 ● Web基准测试集SPEC Web99 ● 嵌入式系统测试集EEMBC ● AMD Opteron存储器层次结构 ● AMD与IA-64比较 ● Intrinsity FastMATH服务器处理器■ 硬件方面的新资料: ● 使用逻辑设计约定 ● 用硬件描述语言设计 ● 高级流水线设计 ● 使用FPGA设计 ● HDL模拟器和使用说明 ● Xilinx CAD工具 ■ 软件方面的新资料: ● 编译器如何工作 ● 如何优化编译器 ● 如何实现面向对象程序设计语言 ● 程序设计语言、编译器、操作系统以及数据库的历史

作者简介

  作者:David A.PattersonDavid A.Patterson加州大学伯克利分校计算机科学系教授,美国国家工程研究院院士,IEEE和ACM会士,曾因成功的启发式教育方法被IEEE授予James H.Mulligan,Jr.教育奖章。他因为对日ISC技术的贡献而荣获1995年IEEE技术成就奖,而在RAID技术方面的成就为他赢得了1999年IEEE Reynold Johnson信息存储奖。2000年他和John L.Hennessy分享了John von Neumann奖。

图书目录

Chapter One: Computer Abstractions and Technology
1.1 Introduction
1.2 Below Your Program
1.3 Under the Covers
1.4 Real Stuff: Manufacturing Pentium 4 Chips
1.5 Fallacies and Pitfalls
1.6 Concluding Remarks
1.7 Historical Perspective and Further Reading
1.8 Exercises
Computers in the Real World: Information Technology for the 4 Billion without IT
Chapter Two: Instructions: Language of the Computer
2.1 Introduction
2.2 Operations of the Computer Hardware
2.3 Operands of the Computer Hardware
2.4 Representing Instructions in the Computer
2.5 Logical Operations
2.6 Instructions for Making Decisions
2.7 Supporting Procedures in Computer Hardware
2.8 Communicating with People
2.9 MIPS Addressing for 32-bit Immediates and Addresses
2.10 Starting a Program
2.11 How Compilers Optimize
2.12 How Compilers Work: An Introduction
2.13 A C Sort Example to Put It All Together
2.14 Implementing an Object Oriented Language
2.15 Arrays versus Pointers
2.16 Real Stuff: IA-32 Instructions
2.17 Fallacies and Pitfalls
2.18 Concluding Remarks
2.19 Historical Perspective and Further Reading
2.20 Exercises
Computers in the Real World: Saving our Environment with Data
Chapter Three: Arithmetic for Computers
3.1 Introduction
3.2 Signed and Unsigned Numbers
3.3 Addition and Subtraction
3.4 Multiplication
3.5 Division
3.6 Floating Point
3.7 Real Stuff: Floating Point in the IA-32
3.8 Fallacies and Pitfalls
3.9 Concluding Remarks
3.10 Historical Perspective and Further Reading
3.11 Exercises
Computers in the Real World: Reconstructing the Ancient World
Chapter Four: Assessing and Understanding Performance
4.1 Introduction
4.2 CPU Performance and Its Factors
4.3 Evaluating Performance
4.4 Real Stuff: Two SPEC Benchmarks and the Performance of Recent Intel Processors
4.5 Fallacies and Pitfalls
4.6 Concluding Remarks
4.7 Historical Perspective and Further Reading
4.8 Exercises
Computers in the Real World: Moving People Faster and More Safely
Chapter Five: The Processor: Datapath and Control
5.1 Introduction
5.2 Logic Design Conventions
5.3 Building a Datapath
5.4 A Simple Implementation Scheme
5.5 A Multicycle Implementation
5.7 Exceptions
5.8 Microprogramming: Simplifying Control Design
5.9 An Introduction to Digital Design Using a Hardware Design Language
5.10 Real Stuff: The Organization of Recent Pentium Implementations
5.11 Fallacies and Pitfalls
5.12 Concluding Remarks
5.13 Historical Perspective and Further Reading
5.14 Exercises
Computers in the Real World: Empowering the Disabled
Chapter Six: Enhancing Performance with Pipelining
6.1 An Overview of Pipelining
6.2 A Pipelined Datapath
6.3 Pipelined Control
6.4 Data Hazards and Forwarding
6.5 Data Hazards and Stalls
6.6 Branch Hazards
6.7 Using a Hardware Description Language to Describe and Model a Pipeline
6.8 Exceptions
6.9 Advanced Pipelining: Extracting More Performance
6.10 Real Stuff: The Pentium 4 Pipeline
6.11 Fallacies and Pitfalls
6.12 Concluding Remarks
6.13 Historical Perspective and Further Reading
6.14 Exercises
Computers in the Real World: Mass Communications without Gatekeepers
Chapter Seven: Large and Fast: Exploiting Memory Hierarchy
7.1 Introduction
7.2 The Basics of Caches
7.3 Measuring and Improving Cache Performance
7.4 Virtual Memory
7.5 A Common Framework for Memory Hierarchies
7.6 Real Stuff: A Pentium P4 and the AMD Opteron Memory Hierarchies
7.7 Fallacies and Pitfalls
7.8 Concluding Remarks
7.9 Historical Perspective and Further Reading
7.10 Exercises
Computers in the Real World: Saving the World?s Art Treasures
Chapter Eight: Storage, Networks, and Other Peripherals
8.1 Introduction
8.2 Disk Storage and Dependability
8.3 Networks
8.4 Buses: Connecting I/O Devices to Processor and Memory
8.5 Interfacing I/O Devices to the Memory, Processor, and Operating System
8.6 I/O Performance Measures: Examples from Disk and File Systems
8.7 Designing an I/O System
8.8 Real Stuff: A Typical Desktop I/O System
8.9 Fallacies and Pitfalls
8.10 Concluding Remarks
8.11 Historical Perspective and Further Reading
8.12 Exercises
Computers in the Real World: Saving Lives Through Better Diagnosis All of the folling material appears on the CD
Chapter Nine: Multiprocessors
9.1 Introduction
9.2 Programming Multiprocessors
9.3 Multiprocessors Connected by a Single Bus
9.4 Multiprocessors Connected by a Network
9.5 Clusters
9.6 Network Topologies
9.7 Multiprocessors Inside a Chip and Multithreading
9.8 Real Stuff: The Google Cluster of PCs
9.9 Fallacies and Pitfalls
9.10 Concluding Remarks
9.11 Historical Perspective and Further Reading
9.12 Exercises
Appendix A: Assemblers, Linkers, and the SPIM Simulator
A.1 Introduction
A.2 Assemblers
A.3 Linkers
A.4 Loading
A.5 Memory Usage
A.6 Procedure Call Convention
A.7 Exceptions and Interrupts
A.8 Input and Output
A.9 SPIM
A.10 MIPS R2000 Assembly Language
A.11 Concluding Remarks
A.12 Exercises
Appendix B: The Basics of Logic Design
B.1 Introduction
B.2 Gates, Truth Tables, and Logic Equations
B.3 Combinational Logic
B.4 Clocks
B.5 Memory Elements
B.6 Finite State Machines
B.7 Timing Methodologies
B.8 Field Programmable Devices
B.9 Concluding Remarks
B.10 Exercises
Appendix C: Mapping Control to Hardware
C.1 Introduction
C.2 Implementing Combinational Control Units
C.3 Implementing Finite State Machine Control
C.4 Implementing the Next-State Function with a Sequencer
C.5 Translating a Microprogram to Hardware
C.6 Concluding Remarks
C.7 Exercises
Appendix D: A Survey of RISC Architectures for Desktop, Server, and Embedded Computers
D.1 Introduction
D.2 Addressing Modes and Instruction Formats
D.3 Instructions: The MIPS Core Subset
D.4 Instructions: Multimedia Extensions of the Desktop/Server RISCs
D.5 Instructions: Digital Signal-Processing Extensions of the Embedded RISCs
D.6 Instructions: Common Extensions to MIPS Core
D.7 Instructions Unique to MIPS64
D.8 Instructions Unique to Alpha
D.9 Instructions Unique to SPARC v.9
D.10 Instructions Unique to PowerPC
D.11 Instructions Unique to PA-RISC 2.0
D.12 Instructions Unique to ARM
D.13 Instructions Unique to Thumb
D.14 Instructions Unique to SuperH
D.15 Instructions Unique to M32R
D.16 Instructions Unique to MIPS16
D.17 Concluding Remarks
D.18 Acknowledgements
D.19 References

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